A circuit design support apparatus for supporting design of a semiconductor integrated circuit includes an upper limit path delay determining unit that sorts circuit paths included in the semiconductor integrated circuit by probability distributions for the delay values of the circuit paths, selects a worst path having a largest delay value in the circuit paths, and determines a maximum delay value as an upper limit path delay value that does not affect an operational timing of the semiconductor integrated circuit, a cell size optimization processor that replaces cells by modifying their cell sizes on the basis of the upper limit path delay value, and a critical path determining unit that determines critical paths that are capable of affecting the upper limit path delay value if the cell size optimization processor replaces cells included in the circuit paths.