A design supporting system of a semiconductor integrated circuit, includes: a scan chain designing section configured to generate a scan chain of scan cells; a specific cell determining section configured to determine as specific scan cells, ones of the scan cells of the scan chain based on the number of gates to be driven when a data held by each of the specific scan cells changes on scan-inputting a pattern data from a scan-in side of the scan chain; and a reordering section configured to reorder the specific scan cells at positions closest to the scan-in side of the scan chain. In the first pattern data, a don't-care bit has a same bit data as that of a care bit.