Invention Grant
- Patent Title: Reduction of threshold voltage instabilities in a MOS transistor
- Patent Title (中): 降低MOS晶体管中的阈值电压不稳定性
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Application No.: US11715268Application Date: 2007-03-06
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Publication No.: US08283707B2Publication Date: 2012-10-09
- Inventor: Jorge Regolini , Pierre Morin , Daniel Benoit
- Applicant: Jorge Regolini , Pierre Morin , Daniel Benoit
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics S.A.
- Current Assignee: STMicroelectronics S.A.
- Current Assignee Address: FR Montrouge
- Agency: Gardere Wynne Sewell LLP
- Priority: FR0602147 20060310
- Main IPC: H01L29/76
- IPC: H01L29/76
Abstract:
A MOS transistor includes an etch stop layer presenting a density of less than a determined threshold value, below which the material of said stop layer is permeable to molecules of dihydrogen and/or water. The material may comprise a nitride. A material used for the etch stop layer preferably has a density value of less than about 2.4 g/cm3.
Public/Granted literature
- US20070215919A1 Reduction of threshold voltage instabilities in a MOS transistor Public/Granted day:2007-09-20
Information query
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