Invention Grant
- Patent Title: Memory arrays
- Patent Title (中): 内存阵列
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Application No.: US12795565Application Date: 2010-06-07
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Publication No.: US08289763B2Publication Date: 2012-10-16
- Inventor: Zengtao Liu
- Applicant: Zengtao Liu
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
Some embodiments include memory arrays. The memory arrays can have global bitlines extending along a first horizontal direction, vertical local bitlines extending perpendicularly from the global bitlines, and wordlines extending along a second horizontal direction which is perpendicular to the first horizontal direction. The global bitlines may be subdivided into a first series at a first elevational level, and a second series at a second elevational level which is different from the first elevational level. The global bitlines of the first series can alternate with the global bitlines of the second series. There can be memory cell material directly between the wordlines and the vertical local bitlines. The memory cell material may form a plurality of memory cells uniquely addressed by wordline/global bitline combinations. Some embodiments include cross-point memory cell units that have areas of about 2F2.
Public/Granted literature
- US20110299328A1 Memory Arrays Public/Granted day:2011-12-08
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