Invention Grant
US08295079B2 Nonvolatile SRAM/latch circuit using current-induced magnetization reversal MTJ
有权
使用电流感应磁化反转MTJ的非易失性SRAM /锁存电路
- Patent Title: Nonvolatile SRAM/latch circuit using current-induced magnetization reversal MTJ
- Patent Title (中): 使用电流感应磁化反转MTJ的非易失性SRAM /锁存电路
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Application No.: US12674860Application Date: 2008-07-31
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Publication No.: US08295079B2Publication Date: 2012-10-23
- Inventor: Shuichiro Yamamoto , Satoshi Sugahara
- Applicant: Shuichiro Yamamoto , Satoshi Sugahara
- Applicant Address: JP Tokyo
- Assignee: Tokyo Institute of Technology
- Current Assignee: Tokyo Institute of Technology
- Current Assignee Address: JP Tokyo
- Agency: Oliff & Berridge, PLC
- Priority: JP2007-225697 20070831; JP2007-227261 20070903
- International Application: PCT/JP2008/063787 WO 20080731
- International Announcement: WO2009/028298 WO 20090305
- Main IPC: G11C11/00
- IPC: G11C11/00
Abstract:
The present invention is a memory circuit that includes a bistable circuit that stores data; and a ferromagnetic tunnel junction device that nonvolatilely stores the data stored in the bistable circuit according to a magnetization direction of a ferromagnetic electrode free layer, the data nonvolatilely stored in the ferromagnetic tunnel junction device being able to be restored in the bistable circuit. According to the present invention, writing data to and reading data from the bistable circuit can be performed at high speed. In addition, even though a power source is shut down, it is possible to restore data nonvolatilely stored in the ferromagnetic tunnel junction devices to the bistable circuit.
Public/Granted literature
- US20110273925A1 NONVOLATILE SRAM/LATCH CIRCUIT USING CURRENT-INDUCED MAGNETIZATION REVERSAL MTJ Public/Granted day:2011-11-10
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