Invention Grant
US08295114B2 Semiconductor memory cell array including dummy bit-line and word-line and semiconductor memory device having the same
有权
包括虚拟位线和字线的半导体存储单元阵列和具有其的半导体存储器件
- Patent Title: Semiconductor memory cell array including dummy bit-line and word-line and semiconductor memory device having the same
- Patent Title (中): 包括虚拟位线和字线的半导体存储单元阵列和具有其的半导体存储器件
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Application No.: US12656984Application Date: 2010-02-22
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Publication No.: US08295114B2Publication Date: 2012-10-23
- Inventor: Sang-Woong Shin , Seong-Jin Jang
- Applicant: Sang-Woong Shin , Seong-Jin Jang
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2009-0016352 20090226
- Main IPC: G11C7/02
- IPC: G11C7/02
Abstract:
A semiconductor memory cell array includes a plurality of bit-lines, a plurality of word-lines, a plurality of memory cells, a plurality of dummy memory cells, a plurality of dummy bit-lines, and a plurality of dummy word-lines. The dummy bit-lines are in outer regions of the bit-lines. The dummy word-lines are in outer regions of the word-lines. The dummy bit-lines are maintained in a floating state. The dummy word-lines retain a turn-off voltage.
Public/Granted literature
- US20100214861A1 Semiconductor memory cell array and semiconductor memory device having the same Public/Granted day:2010-08-26
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