A digital audio signal, a channel clock, and a bit clock are transmitted to the receiving apparatus via a pair of signal lines. The digital audio signal is input to a D/A converter via a first comparator. The channel clock and the bit clock are received, separated with first and second separation circuits, and input to the D/A converter via the second and third comparators. A reference electrical potential of the second comparator is corrected such that it becomes half or approximately half of an amplitude of the channel clock depending on an electrical potential change of the output of a second differential signal receiving circuit. A system clock is generated based on the bit clock. The digital audio signal is converted into the analog audio signal based on the channel clock, the bit clock, and the system clock, and then the converted analog audio signal is output.