Invention Grant
US08295444B2 Systems and methods for performing loop analysis based on un-calibrated single-ended line testing
有权
基于未校准的单端线路测试执行环路分析的系统和方法
- Patent Title: Systems and methods for performing loop analysis based on un-calibrated single-ended line testing
- Patent Title (中): 基于未校准的单端线路测试执行环路分析的系统和方法
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Application No.: US12138692Application Date: 2008-06-13
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Publication No.: US08295444B2Publication Date: 2012-10-23
- Inventor: Vaibhav Dinesh , Kunal Raheja , Patrick Duvaut
- Applicant: Vaibhav Dinesh , Kunal Raheja , Patrick Duvaut
- Applicant Address: US CA Fremont
- Assignee: Ikanos Communications, Inc.
- Current Assignee: Ikanos Communications, Inc.
- Current Assignee Address: US CA Fremont
- Agency: Pillsbury Winthrop Shaw Pittman LLP
- Agent Mark J. Danielson
- Main IPC: H04M1/24
- IPC: H04M1/24 ; H04M3/08 ; H04M3/22

Abstract:
Systems and methods for performing loop analysis are described. Some embodiments are directed to determining loop characteristics such as loop gauge, loop termination, and straight-loop departure. One embodiment includes a method for performing loop length estimation which comprises receiving an un-calibrated echo signal for a loop under test using frequency domain reflectometry single-ended line testing (FDR-SELT), a region associated with the loop under test, and a platform type. The method comprises classifying the loop under test and outputting a loop length estimate based on the classification of the loop under test and based on one of a ripple-period approach and a template-matching approach.
Public/Granted literature
- US20090310755A1 SYSTEMS AND METHODS FOR PERFORMING LOOP ANALYSIS BASED ON UN-CALIBRATED SINGLE-ENDED LINE TESTING Public/Granted day:2009-12-17
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