Invention Grant
- Patent Title: SAT-based synthesis of a clock gating function
- Patent Title (中): 基于SAT的时钟门控功能的综合
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Application No.: US12579442Application Date: 2009-10-15
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Publication No.: US08296256B2Publication Date: 2012-10-23
- Inventor: Eli Arbel , Oleg Rokhlenko , Karen Yorav
- Applicant: Eli Arbel , Oleg Rokhlenko , Karen Yorav
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: G&A Glazburg Applbaum
- Agent Ziv Glazberg
- Main IPC: G06N7/06
- IPC: G06N7/06 ; G06F17/50

Abstract:
Clock gating circuit is determined by transforming a clock gating opportunity function to a non-Boolean function and constraining inputs of the non-Boolean function. The non-Boolean function may be a ternary function. Constraining the inputs may be achieved by introducing control variables and a cardinality constraint associated with their values. The non-Boolean function may be utilized to approximate universal quantification of an input assigned with a non-Boolean value, such as “don't care” value. The non-Boolean function may be utilized to provide an ALL SAT solution of a Boolean function using a SAT solver.
Public/Granted literature
- US20110093431A1 SAT-BASED SYNTHESIS OF A CLOCK GATING FUNCTION Public/Granted day:2011-04-21
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