Invention Grant
US08298874B2 Packaged electronic devices having die attach regions with selective thin dielectric layer
有权
封装的电子器件具有具有选择性薄介电层的裸片附着区域
- Patent Title: Packaged electronic devices having die attach regions with selective thin dielectric layer
- Patent Title (中): 封装的电子器件具有具有选择性薄介电层的裸片附着区域
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Application No.: US13526116Application Date: 2012-06-18
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Publication No.: US08298874B2Publication Date: 2012-10-30
- Inventor: Bernardo Gallegos , Kenji Masumoto
- Applicant: Bernardo Gallegos , Kenji Masumoto
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Steven A. Shaw; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: H01L21/00
- IPC: H01L21/00
Abstract:
A method for forming a packaged electronic device including a package substrate having a top substrate surface including a die attach region including at least one land pad thereon and a first dielectric layer positioned lateral to the land pad and a non-die attach region. A second dielectric layer is formed on the top substrate surface of the package substrate. An IC die which is mounted to the top substrate surface of the package substrate. An underfill layer is formed between the IC die and the die attach region.
Public/Granted literature
- US20120252170A1 PACKAGED ELECTRONIC DEVICES HAVING DIE ATTACH REGIONS WITH SELECTIVE THIN DIELECTRIC LAYER Public/Granted day:2012-10-04
Information query
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