A pair of power nodes of a logic circuit that needs to output a high level at the time of standby is connected to third and fifth dummy power lines and a pair of power nodes of a logic circuit that needs to output a low level at the time of standby are connected to second and sixth dummy power lines. Fourth, third, sixth, and fifth potentials of the second, third, fifth, and sixth dummy power lines satisfy fourth potential fifth potential>second potential. With this configuration, a leakage current flowing between a substrate and a gate of a transistor that becomes on at the time of standby, and a leakage current flowing between the substrate and a drain of a transistor that becomes off at the time of standby can be reduced.