Invention Grant
- Patent Title: Staggered reset in CMOS digital sensor device
- Patent Title (中): CMOS数字传感器设备中的交错复位
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Application No.: US12335248Application Date: 2008-12-15
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Publication No.: US08300126B2Publication Date: 2012-10-30
- Inventor: Ying Huang , Giuseppe Rossi
- Applicant: Ying Huang , Giuseppe Rossi
- Applicant Address: US CA Westlake Village
- Assignee: AltaSens, Inc.
- Current Assignee: AltaSens, Inc.
- Current Assignee Address: US CA Westlake Village
- Agency: Turocy & Watson, LLP
- Main IPC: H04N5/335
- IPC: H04N5/335

Abstract:
Systems and methods are provided that facilitate staggering resets of rows of pixels in a CMOS imaging iSoC sensor. Reset signals and select signals can be provided to pixels in a pixel array in a coordinated manner when employing full frame integration or sub-frame integration. Further, reset signals and select signals can be transferred to a first row of pixels, while reset signals can be transferred to a second row of pixels during a unique readout time interval when utilizing sub-frame integration. Within the unique readout time interval, reset signals can be transferred to the first row of pixels during a first time period, while reset signals can be transferred to the second row of pixels during a second time period, where the first and second time periods are non-overlapping. Accordingly, cross-talk between rows of pixels during reset can be mitigated, which leads to enhanced uniformity.
Public/Granted literature
- US20100149390A1 STAGGERED RESET IN CMOS DIGITAL SENSOR DEVICE Public/Granted day:2010-06-17
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