Invention Grant
- Patent Title: Single-transistor EEPROM array and operation methods
- Patent Title (中): 单晶体管EEPROM阵列及其操作方法
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Application No.: US13367122Application Date: 2012-02-06
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Publication No.: US08300462B2Publication Date: 2012-10-30
- Inventor: Chun-Pei Wu , Chia-Ta Shieh , Chih-Wei Hung , Mars Chen
- Applicant: Chun-Pei Wu , Chia-Ta Shieh , Chih-Wei Hung , Mars Chen
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A method includes performing an operation on an electrically erasable programmable read-only memory (EEPROM) array. The operation is selected from a program operation and an erase operation. The EEPROM array includes EEPROM cells arranged in rows and columns, and a plurality of word-lines extending in a column direction. Each of the plurality of word-lines is connected to control gates of the EEPROM cells in a same column. The EEPROM array further includes a plurality of source-lines extending in a row direction. Each of the plurality of source-lines is connected to sources of the EEPROM cells in a same row. During the operation, a first source-line in the plurality of source-lines is applied with a first source-line voltage, and a second source-line in the plurality of source-lines is applied with a second source-line voltage different from the first source-line voltage.
Public/Granted literature
- US20120134209A1 Single-Transistor EEPROM Array and Operation Methods Public/Granted day:2012-05-31
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