An information handling system (IHS) may include a processor with multiple compute elements that decode pictures from an encoded video bitstream. Each compute element may perform a different part or sequential stage of a picture decoding process to obtain decoded pictures. A memory includes a decoded picture buffer that associates with a first stage of the sequential stages. The memory may also include respective decoded picture buffer snapshots for sequential stages other than the first sequential stage. A last sequential stage provides fully decoded pictures to a decoded picture pool in memory. The decoded picture buffer and decoded picture buffer snapshots may store pointers to decoded pictures in the decoded picture pool that the sequential stages need to perform decoding of pictures. In this manner, the sequential stages may share decoded pictures that the decoded picture pool stores.