Invention Grant
US08301844B2 Consistency evaluation of program execution across at least one memory barrier 有权
至少一个记忆障碍的程序执行的一致性评估

Consistency evaluation of program execution across at least one memory barrier
Abstract:
Multi-processor systems and methods are disclosed. One embodiment may comprise a multi-processor system including a processor that executes program instructions across at least one memory barrier. A request engine may provide an updated data fill corresponding to an invalid cache line. The invalid cache line may be associated with at least one executed load instruction. A load compare component may compare the invalid cache line to the updated data fill to evaluate the consistency of the at least one executed load instruction.
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