Invention Grant
- Patent Title: Restricting memory areas for an instruction read in dependence upon a hardware mode and a security flag
- Patent Title (中): 限制根据硬件模式和安全标志读取的指令的存储区
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Application No.: US12656786Application Date: 2010-02-16
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Publication No.: US08301856B2Publication Date: 2012-10-30
- Inventor: Richard Roy Grisenthwaite
- Applicant: Richard Roy Grisenthwaite
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Main IPC: G06F12/14
- IPC: G06F12/14
Abstract:
An apparatus for processing data 2 includes a processor 8, a memory 6 and memory control circuitry 12. The processor 8 operates in a plurality of hardware modes including a privileged mode and a user mode. When operating in the privileged mode, the processor 8 is blocked by the memory control circuitry 12 from fetching instructions from memory address regions 34, 38, 42 within the memory 6 which are writeable within the user mode if a security flag within register 46 is set to indicate that this blocking mechanism is active.
Public/Granted literature
- US20110202739A1 Restricting memory areas for an instruction read in dependence upon a hardware mode and a security flag Public/Granted day:2011-08-18
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