Invention Grant
- Patent Title: Semiconductor circuit apparatus and delay difference calculation method
- Patent Title (中): 半导体电路装置和延迟差计算方法
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Application No.: US12562563Application Date: 2009-09-18
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Publication No.: US08305149B2Publication Date: 2012-11-06
- Inventor: Itsumi Sugiyama
- Applicant: Itsumi Sugiyama
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2008-256375 20081001
- Main IPC: H03K3/03
- IPC: H03K3/03 ; G01R31/27

Abstract:
A semiconductor circuit apparatus having a clock oscillating circuit includes a first inverter circuit having a power supply terminal connected to a power supply potential via a first power supply potential connection transistor and a ground terminal connected to a ground potential via a first ground potential connection transistor, an inverter circuit block having a second inverter circuit connected to the power supply potential via a second power supply potential connection transistor and to the ground potential via a second ground potential connection transistor and connected to the first inverter circuit in parallel and a selection circuit block that outputs a power supply potential connection signal to any one of gate terminals of the first and second power supply potential connection transistors and a ground potential connection signal to any one of gate terminals of the first and second ground potential connection transistors.
Public/Granted literature
- US20100079212A1 SEMICONDUCTOR CIRCUIT APPARATUS AND DELAY DIFFERENCE CALCULATION METHOD Public/Granted day:2010-04-01
Information query
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