A solid-state image sensor element outputs either n bits or in a bit number of an integral multiple of n in synchronization with an output clock. An allocating unit allocates respective bit data of pixel signals obtained by the solid-state image sensor element into at least two series of bit data alternately, in synchronization with a clock converted by a clock converting unit. A first selector selects an output from the bit data allocated by the allocating unit and the bit data not allocated by the allocating unit. A second selector selects an output from a clock with a frequency converted by the clock converting unit and a clock with a frequency not converted by the clock converting unit.