Invention Grant
- Patent Title: Stacked solid electrolytic capacitor with multi-pin structure
- Patent Title (中): 堆叠固体电解电容器,多引脚结构
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Application No.: US12627576Application Date: 2009-11-30
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Publication No.: US08305735B2Publication Date: 2012-11-06
- Inventor: Yui-Shin Fran , Ching-Feng Lin , Chi-Hao Chiu , Chun-Chia Huang , Wen-Yen Huang
- Applicant: Yui-Shin Fran , Ching-Feng Lin , Chi-Hao Chiu , Chun-Chia Huang , Wen-Yen Huang
- Applicant Address: TW Jhunan Township
- Assignee: Apaq Technology Co., Ltd.
- Current Assignee: Apaq Technology Co., Ltd.
- Current Assignee Address: TW Jhunan Township
- Agency: Nikolai & Mersereau, P.A.
- Agent C. G. Mersereau
- Priority: TW98123042A 20090708
- Main IPC: H01G4/228
- IPC: H01G4/228 ; H01G5/38 ; H01G9/00

Abstract:
A stacked solid electrolytic capacitor with positive multi-pin structure includes a plurality of capacitor units, a substrate unit and a package unit. The positive electrode of each capacitor unit has a positive pin extended outwards therefrom. The positive pins are divided into a plurality of positive pin units that are separated from each other and electrically stacked onto each other. The negative electrode of each capacitor unit has a negative pin extended outwards therefrom. The negative pins are divided into a plurality of negative pin units. The negative pin units are separated from each other and the negative pins of each negative pin unit are electrically stacked onto each other. The substrate unit has a positive guiding substrate electrically connected to the positive pins and a negative guiding substrate electrically connected to the negative pins. The package unit covers the capacitor units and one part of the substrate unit.
Public/Granted literature
- US20110007451A1 STACKED SOLID ELECTROLYTIC CAPACITOR WITH MULTI-PIN STRUCTURE Public/Granted day:2011-01-13
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