Invention Grant
US08305821B2 Memory systems and methods for dynamically phase adjusting a write strobe and data to account for receive-clock drift
有权
用于动态相位调整写选通和数据以考虑接收时钟漂移的存储器系统和方法
- Patent Title: Memory systems and methods for dynamically phase adjusting a write strobe and data to account for receive-clock drift
- Patent Title (中): 用于动态相位调整写选通和数据以考虑接收时钟漂移的存储器系统和方法
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Application No.: US13111667Application Date: 2011-05-19
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Publication No.: US08305821B2Publication Date: 2012-11-06
- Inventor: Frederick A. Ware
- Applicant: Frederick A. Ware
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Silicon Edge Law Group LLP.
- Agent Arthur J. Behiel
- Main IPC: G11C7/00
- IPC: G11C7/00
Abstract:
A memory system includes a memory controller that writes data to and reads data from a memory device. A write data strobe accompanying the write data indicates to the memory device when the write data is valid, whereas a read strobe accompanying data from the memory device indicates to the memory controller when the read data is valid. The memory controller adaptively controls the phase of the write strobe to compensate for timing drift at the memory device. The memory controller uses the read strobe as a measure of the drift.
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