Invention Grant
US08305826B2 Method and apparatus for programming an anti-fuse element in a high-voltage integrated circuit
有权
用于在高压集成电路中编程抗熔丝元件的方法和装置
- Patent Title: Method and apparatus for programming an anti-fuse element in a high-voltage integrated circuit
- Patent Title (中): 用于在高压集成电路中编程抗熔丝元件的方法和装置
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Application No.: US12800095Application Date: 2010-05-07
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Publication No.: US08305826B2Publication Date: 2012-11-06
- Inventor: Sujit Banerjee , Giao Minh Pham
- Applicant: Sujit Banerjee , Giao Minh Pham
- Applicant Address: US CA San Jose
- Assignee: Power Integrations, Inc.
- Current Assignee: Power Integrations, Inc.
- Current Assignee Address: US CA San Jose
- Agency: The Law Offices of Bradley J. Bereznak
- Main IPC: G11C17/00
- IPC: G11C17/00 ; G11C17/18

Abstract:
A method for programming a programmable block of a power IC device includes selecting an anti-fuse element of the programmable block to be programmed. The anti-fuse element includes first and second capacitive plates separated by a dielectric layer. A voltage pulse is then applied to a pin of the power IC device. The pin is connected to a drain of a high-voltage field-effect transistor (HVFET) that drives an external load via the pin during a normal operating mode of the power IC device. The voltage pulse, which is coupled to the first capacitive plate of the anti-fuse element, has a potential sufficiently high to cause a current to flow through the anti-fuse element that destroys at least a portion of the dielectric layer, thereby electrically shorting the first and second capacitive plates.
Public/Granted literature
- US20110273950A1 Method and apparatus for programming an anti-fuse element in a high-voltage integrated circuit Public/Granted day:2011-11-10
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