A 4× over-sampling data recovery system consists of a charge pump PLL, a 4× over-sampler, a data regenerator and a digital PLL. The charge pump PLL receives a clock signal and generates a plurality of multiplicative clock signals in response to the clock signal. The 4× over-sampler samples a serial data to generate a M-bit signal according to the plurality of multiplicative clock signals, wherein each bit in the serial data is sampled for four times. The data regenerator sequentially receives and combines two M-bit signals to generate a (M+N)-bit signal. The digital PLL divides the (M+N)-bit signal into (N+1) groups of M-bit data and selects a designated M-bit data from the (N+1) groups of M-bit data to generate a P-bit recovery data.