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US08306802B2 Method for modeling an HDL design using symbolic simulation 有权
使用符号模拟建模HDL设计的方法

Method for modeling an HDL design using symbolic simulation
Abstract:
A method for digital circuit design. The first step of the process is the step of providing a circuit design in the form of a hardware definition language. Then, the process produces a binary simulation of the design by setting out for each unit of time during execution of the hardware design the a control state and a program state of the design and assigns a symbol to each signal of the design. The process proceeds by executing a symbolic simulation of the design, concluding with identifying and capturing the combinational logic expression of the simulation output and the next state functions of the simulation.
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