Invention Grant
- Patent Title: Method, apparatus, and system for reducing leakage power consumption
- Patent Title (中): 降低泄漏功耗的方法,装置和系统
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Application No.: US13331854Application Date: 2011-12-20
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Publication No.: US08307226B1Publication Date: 2012-11-06
- Inventor: Alexander Gendler
- Applicant: Alexander Gendler
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F1/00
- IPC: G06F1/00 ; G06F1/32

Abstract:
Described herein are method, apparatus, and system for reducing leakage power consumption. The method comprises determining an input vector for input to a logic unit, the input vector for generating a least leakage power dissipation in the logic unit; and applying the input vector to the logic unit when a clock signal associated with the logic unit is gated. The method results in reduced leakage power consumption for the logic unit when the logic unit is not active with performing its normal operation, i.e. when the logic unit is idle.
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