Invention Grant
US08307312B2 Simulation method of logic circuit 失效
逻辑电路仿真方法

  • Patent Title: Simulation method of logic circuit
  • Patent Title (中): 逻辑电路仿真方法
  • Application No.: US12190477
    Application Date: 2008-08-12
  • Publication No.: US08307312B2
    Publication Date: 2012-11-06
  • Inventor: Miki Terabe
  • Applicant: Miki Terabe
  • Applicant Address: JP Kawasaki
  • Assignee: Fujitsu Limited
  • Current Assignee: Fujitsu Limited
  • Current Assignee Address: JP Kawasaki
  • Agency: Staas & Halsey LLP
  • Priority: JP2007-212127 20070816
  • Main IPC: G06F17/50
  • IPC: G06F17/50
Simulation method of logic circuit
Abstract:
A simulation method of a logic circuit is provided. The simulation method includes operations dividing the logic circuit into a plurality of divided circuits, determining the divided circuit constructing a path circuit of the logic circuit, determining an auxiliary divided circuit that is the divided circuit not constructing the path circuit and affects on a simulation result of the path circuit. The method also includes executing a simulation calculation of a part of the circuit including the divide circuit constructing the path circuit and the auxiliary divided circuit.
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