Invention Grant
- Patent Title: Semiconductor apparatus
- Patent Title (中): 半导体装置
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Application No.: US12222601Application Date: 2008-08-12
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Publication No.: US08310066B2Publication Date: 2012-11-13
- Inventor: Kou Sasaki
- Applicant: Kou Sasaki
- Applicant Address: JP Kawasaki-Shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-Shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2007/221426 20070828
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A semiconductor apparatus capable of detecting a crack generated in a semiconductor chip while the design freedom, the layout freedom of a wiring, the layout efficiency of LSI, and the layout efficiency of a package substrate are improved. The semiconductor apparatus according to the invention includes a semiconductor chip having a multilayered wiring structure; plural electrode pads being formed on a top surface along the outer periphery of the semiconductor chip; and a wiring being coupled to a first electrode pad and a second electrode pad selected from the plural electrode pads and formed along the entire outer periphery of the semiconductor chip in plan view. The wiring includes a first wiring and a second wiring that are formed on different layers, and the first wiring and the second wiring are connected in series by a connection plug.
Public/Granted literature
- US20090057925A1 Semiconductor apparatus Public/Granted day:2009-03-05
Information query
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