Invention Grant
- Patent Title: Wiring verification system, wiring verification method, and wiring verification program product
- Patent Title (中): 接线验证系统,接线验证方法和接线验证程序产品
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Application No.: US12730993Application Date: 2010-03-24
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Publication No.: US08312411B2Publication Date: 2012-11-13
- Inventor: Masahito Kumazaki
- Applicant: Masahito Kumazaki
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Main IPC: G06F11/22
- IPC: G06F11/22 ; G06F17/50

Abstract:
A wiring verification system is provided which is capable of simultaneously solving problems of wiring constraints on each board and of total skew in a wire passing through a plurality of boards. Board data, external connection board data, inter-board connection information, and wiring constraints are inputted in advance. When a system netlist creating unit (including a software means) creates a system netlist showing a theoretical connection relation of each board, an external connection tracing unit (including a software means) extracts external connection information based on the system netlist. An external load producing unit (including a software means) produces an external dummy load converted to a wire length or wire delay of the outside based on extracted external connection information. A wiring verification unit (including a software means) performs verification of a wiring state of an entire board by using the produced external dummy load. This enables proper distribution of wiring constraints on each board and solution of the total skew simultaneously.
Public/Granted literature
- US20100251195A1 WIRING VERIFICATION SYSTEM, WIRING VERIFICATION METHOD, AND WIRING VERIFICATION PROGRAM PRODUCT Public/Granted day:2010-09-30
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