Invention Grant
- Patent Title: Apparatus for detecting pattern alignment error
- Patent Title (中): 用于检测图案对准误差的装置
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Application No.: US13098764Application Date: 2011-05-02
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Publication No.: US08315064B2Publication Date: 2012-11-20
- Inventor: Jeong Hyun Park
- Applicant: Jeong Hyun Park
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2007-0091798 20070910
- Main IPC: H05K7/00
- IPC: H05K7/00

Abstract:
An apparatus for detecting pattern alignment error includes a first conductive pattern disposed over a first insulation member with a power source applied of the first conductive pattern; a second insulation member for covering the first conductive pattern; a second conductive pattern disposed on the second insulation member; a conductive via connected to the second conductive pattern and passing through the second insulation member; and an insulation pattern disposed in the first conductive pattern for detecting an alignment error in response to a position of the conductive via. The apparatus for detecting pattern alignment error can detect the alignment of lower wiring in a device with multi-layer wiring.
Public/Granted literature
- US20110203935A1 APPARATUS FOR DETECTING PATTERN ALIGNMENT ERROR Public/Granted day:2011-08-25
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