Invention Grant
- Patent Title: Memory system
- Patent Title (中): 内存系统
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Application No.: US13273876Application Date: 2011-10-14
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Publication No.: US08315098B2Publication Date: 2012-11-20
- Inventor: Tokumasa Hara
- Applicant: Tokumasa Hara
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-233104 20101015
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
A memory system includes a NAND flash memory having a page buffer capable of holding a page of data and a cell array having a plurality of pages. The system also includes a plurality of memory portions electrically connected to the NAND flash memory via a data bus, and a controller for controlling the NAND flash memory and the plurality of memory portions. A width of the data bus is less than a size of the page of data. When any one of a write operation and a read operation is performed on the NAND flash memory, the controller exchanges data held in the page buffer and data held in one memory portion of the plurality of memory portions.
Public/Granted literature
- US20120092927A1 MEMORY SYSTEM Public/Granted day:2012-04-19
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