Invention Grant
US08319533B2 System for detecting a reset condition in an electronic circuit 有权
用于检测电子电路中的复位状态的系统

System for detecting a reset condition in an electronic circuit
Abstract:
There is disclosed a system for detecting the assertion of a reset signal. A plurality of circuit elements is configurable by a reset signal to output a string of data values in a predetermined pattern. A comparator receives the string of data values and determines whether the string of data values matches the predetermined pattern. If so, the comparator generates an output signal indicative of a reset. In one embodiment, the output signal of the comparator can be used to automatically trigger a reset if the reset signal has not been asserted.
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