Invention Grant
- Patent Title: Method of manufacturing an interposer
- Patent Title (中): 制造插入件的方法
-
Application No.: US12211529Application Date: 2008-09-16
-
Publication No.: US08322031B2Publication Date: 2012-12-04
- Inventor: Chin Hui Chong , Choon Kuan Lee
- Applicant: Chin Hui Chong , Choon Kuan Lee
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Priority: SG200405514-1 20040827
- Main IPC: H01K3/10
- IPC: H01K3/10

Abstract:
Circuit boards, microelectronic devices, and other apparatuses having slanted vias are disclosed herein. In one embodiment, an apparatus for interconnecting electronic components includes a dielectric portion having a first surface and a second surface. A first terminal is disposed on the first surface of the dielectric portion for connection to a first electronic component. A second terminal is disposed on the second surface of the dielectric portion for connection to a second electronic component. The apparatus further includes a passage extending through the dielectric portion along a longitudinal axis oriented at an oblique angle relative to the first surface. The passage is at least partially filled with conductive material electrically connecting the first terminal to the second terminal.
Public/Granted literature
- US20090008144A1 SLANTED VIAS FOR ELECTRICAL CIRCUITS ON CIRCUIT BOARDS AND OTHER SUBSTRATES Public/Granted day:2009-01-08
Information query