Invention Grant
- Patent Title: Multilayer printed wiring board
- Patent Title (中): 多层印刷线路板
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Application No.: US13004325Application Date: 2011-01-11
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Publication No.: US08324512B2Publication Date: 2012-12-04
- Inventor: Yukihiko Toyoda , Yoichiro Kawamura , Tomoyuki Ikeda
- Applicant: Yukihiko Toyoda , Yoichiro Kawamura , Tomoyuki Ikeda
- Applicant Address: JP Ogaki-shi
- Assignee: Ibiden Co., Ltd.
- Current Assignee: Ibiden Co., Ltd.
- Current Assignee Address: JP Ogaki-shi
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2001-073066 20010314; JP2001-075856 20010316; JP2001-209953 20010710; JP2001-209954 20010710; JP2001-209955 20010710
- Main IPC: H05K1/11
- IPC: H05K1/11

Abstract:
A multilayered printed circuit board including a substrate, a multilayered structure built thereon and having conductor circuits and interlaminar resin insulating layers in an alternate fashion, and one or more stack-via structures including via-holes stacked one another and electrically connected to the conductor circuits through the insulating layers. Each of the via-holes includes a land portion formed on a respective one of the insulating layers and a filled via structure portion filling an opening of the respective one of the insulating layers with a metal layer such that the via-holes are stacked one another immediately above the filled via structure portion of each via-hole, the via-holes include the outermost layer via-hole in the outermost layer of the insulating layers, and one or more via-holes have the land portion having the land diameter which is larger than the land diameter of the land portion of the outermost layer via-hole.
Public/Granted literature
- US20110108311A1 MULTILAYER PRINTED WIRING BOARD Public/Granted day:2011-05-12
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