Invention Grant
US08325714B2 Serial-to-parallel transceiver with programmable parallel data path width
有权
具有可编程并行数据路径宽度的串行到并行收发器
- Patent Title: Serial-to-parallel transceiver with programmable parallel data path width
- Patent Title (中): 具有可编程并行数据路径宽度的串行到并行收发器
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Application No.: US11519549Application Date: 2006-09-12
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Publication No.: US08325714B2Publication Date: 2012-12-04
- Inventor: Timothy Eric Giorgetta , Madjid A. Hamidi
- Applicant: Timothy Eric Giorgetta , Madjid A. Hamidi
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Kevin T. Cheatham
- Main IPC: H04Q11/00
- IPC: H04Q11/00 ; H04B1/38

Abstract:
A system and method are provided for programming the parallel path width in a serial-to-parallel path transceiver. Initially, the transceiver is programmed to select a link layer (layer 1) protocol, such as Gigabit Ethernet (GBE) or SONET. The method accepts serial digital data in the selected protocol at a serial interface, and differentiates the serial data into units of i bits per unit. Another programmed selection is made between n number of unique data interfaces, where each interface includes a plurality of parallel paths. The serial digital data is assigned to z selected data interfaces and transmitted. In one aspect, the serial data is assigned to m number of parallel path channels, where m is less than, or equal to z, and less than i. In another aspect, the frequency at which each data interface parallel path transmits data is selected.
Public/Granted literature
- US20080123721A1 Serial-to-parallel transceiver with programmable parallel data path width Public/Granted day:2008-05-29
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