Invention Grant
US08327117B2 Reconfigurable FADEC with flash based FPGA control channel and ASIC sensor signal processor for aircraft engine control
有权
可重配置FADEC，具有闪存的FPGA控制通道和ASIC传感器信号处理器，用于飞机发动机控制
- Patent Title: Reconfigurable FADEC with flash based FPGA control channel and ASIC sensor signal processor for aircraft engine control
- Patent Title (中): 可重配置FADEC，具有闪存的FPGA控制通道和ASIC传感器信号处理器，用于飞机发动机控制
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Application No.: US12201129Application Date: 2008-08-29
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Publication No.: US08327117B2Publication Date: 2012-12-04
- Inventor: Lawrence Mitchell Smilg , James Ernst , Robert Zeller
- Applicant: Lawrence Mitchell Smilg , James Ernst , Robert Zeller
- Applicant Address: US IN Indianapolis
- Assignee: Rolls-Royce Corporation
- Current Assignee: Rolls-Royce Corporation
- Current Assignee Address: US IN Indianapolis
- Agency: McCormick, Paulding & Huber LLP
- Main IPC: G06F13/00
- IPC: G06F13/00
Abstract:
A reconfigurable FADEC includes a reconfigurable CPU configured for performing digital computing functions. A reconfigurable MSPD communicates with the CPU and is configured for performing analog I/O functions. A data bus is coupled to the CPU and the MSPD. The data bus is configured for connecting the CPU and the MSPD to an external connector.
Public/Granted literature
- US20100057957A1 RECONFIGURABLE FADEC FOR GAS TURBINE ENGINE Public/Granted day:2010-03-04
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