Invention Grant
- Patent Title: Scheduling control within a data processing system
- Patent Title (中): 数据处理系统内的调度控制
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Application No.: US12458699Application Date: 2009-07-21
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Publication No.: US08327118B2Publication Date: 2012-12-04
- Inventor: David Michael Bull , Emre Ozer , Shidhartha Das
- Applicant: David Michael Bull , Emre Ozer , Shidhartha Das
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Priority: GB0816296.8 20080905
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/40 ; G06F15/00
Abstract:
A processor 2 is responsive to a stream of program instructions to issue program instructions under control of scheduling circuitry 6 to respective execution units 24 for execution. The execution units 24 can include error detecting circuitry 32 for detecting a change in an output signal which occurs after the output signal has latched and during an error detecting period following the latching of the output signal. The scheduling circuitry 6 is arranged so as to suppress issue of program instructions to an execution unit 24 having such error detecting circuitry 32 on consecutive processing cycles.
Public/Granted literature
- US20100064287A1 Scheduling control within a data processing system Public/Granted day:2010-03-11
Information query
