Invention Grant
US08327207B2 Memory testing system 有权
内存测试系统

Memory testing system
Abstract:
An array built-in self test (ABIST) system includes a first latch having a first data input, a first scan input and first output and a second latch having a second data input, a second scan input and a second output. The system also includes a first ABIST logic block coupled to the first output that compares a first expected value with a first data value received at the first data input and provided to the first ABIST logic block after a first clock is applied to the first latch. The system also includes a second ABIST logic block coupled to the second output that compares a second expected value with a second data value received at the second data input and provided to the second ABIST logic block after a second clock is applied to the second latch.
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