A method of wafer level packaging includes providing a substrate including a buried oxide layer and a top oxide layer, and etching the substrate to form openings above the buried oxide layer and a micro-electro-mechanical systems (MEMS) resonator element between the openings, the MEMS resonator element enclosed within the buried oxide layer, the top oxide layer, and sidewall oxide layers. The method further includes filling the openings with polysilicon to form polysilicon electrodes adjacent the MEMS resonator element, removing the top oxide layer and the sidewall oxide layers adjacent the MEMS resonator element, bonding the polysilicon electrodes to one of a complementary metal-oxide semiconductor (CMOS) wafer or a carrier wafer, removing the buried oxide layer adjacent the MEMS resonator element, and bonding the substrate to a capping wafer to seal the MEMS resonator element between the capping wafer and one of the CMOS wafer or the carrier wafer.