Activate one active word line of two active word lines formed between two isolation word lines to a logic-high voltage, and float another active word line of the two active word lines. Then activate a plurality of first memory cells corresponding to the active word line having the logic-high voltage to a logic “1” voltage, and write a logic “0” voltage to a plurality of second memory cells corresponding to the floating active word line. Then write the logic “1” voltage to a plurality of bit lines. Then, suspend for charge sharing for a third predetermined time. Finally, read a voltage of the floating active word line to check if any leakage path exists between the floating active word line and the active word line having the logic-high voltage.