Invention Grant
- Patent Title: Low-power analog architecture for brain-machine interfaces
- Patent Title (中): 用于脑机接口的低功耗模拟架构
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Application No.: US12127497Application Date: 2008-05-27
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Publication No.: US08332024B2Publication Date: 2012-12-11
- Inventor: Benjamin I. Rapoport , Rahul Sarpeshkar , Woradorn Wattanapanitch , Soumyajit Mandal , Scott Arfin
- Applicant: Benjamin I. Rapoport , Rahul Sarpeshkar , Woradorn Wattanapanitch , Soumyajit Mandal , Scott Arfin
- Applicant Address: US MA Cambridge
- Assignee: Massachusetts Institute of Technology
- Current Assignee: Massachusetts Institute of Technology
- Current Assignee Address: US MA Cambridge
- Agency: Gesmer Updegrove LLP
- Main IPC: A61B5/04
- IPC: A61B5/04 ; H03F3/45
Abstract:
An ultra-low-power circuit for wireless neural recording and stimulation is provided. The circuit includes a neural amplifier with adaptive power biasing for use in multi-electrode arrays and a decoding and/or learning architecture. An impedance-modulation telemetry system provides low-power data telemetry. Also, the circuit includes a wireless link for efficient power transfer, and at least one circuit for wireless stimulation of neurons.
Public/Granted literature
- US20080294062A1 LOW-POWER ANALOG ARCHITECTURE FOR BRAIN-MACHINE INTERFACES Public/Granted day:2008-11-27
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