Invention Grant
US08335886B2 Wear leveling method for non-volatile memory device having single and multi level memory cell blocks
有权
具有单层和多层存储单元块的非易失性存储器件的耐磨均衡方法
- Patent Title: Wear leveling method for non-volatile memory device having single and multi level memory cell blocks
- Patent Title (中): 具有单层和多层存储单元块的非易失性存储器件的耐磨均衡方法
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Application No.: US12534358Application Date: 2009-08-03
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Publication No.: US08335886B2Publication Date: 2012-12-18
- Inventor: Yang-sup Lee
- Applicant: Yang-sup Lee
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2008-0109467 20081105
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F13/28 ; G11C16/04 ; G11C16/06

Abstract:
A method of executing a wear leveling operation within a non-volatile memory including a single-level memory cell block (SLC) and a multi-level memory cell block (MLC) is disclosed. The method includes calculating an average erase point in relation to a number of programming/erase (P/E) operations applied to a logical block address (LBA), a SLC mode usage point in relation to a number of the P/E operations applied to the SLC, a MLC mode usage point in relation to a number of the P/E operations applied to the MLC, and a wear value in relation to the average erase point, the SLC mode usage point, and the MLC mode usage point; and then if the wear value exceeds a defined threshold value, performing the wear leveling operation.
Public/Granted literature
- US20100115192A1 WEAR LEVELING METHOD FOR NON-VOLATILE MEMORY DEVICE HAVING SINGLE AND MULTI LEVEL MEMORY CELL BLOCKS Public/Granted day:2010-05-06
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