Invention Grant
US08341381B2 Twisted and wrapped array organized into clusters of processing elements
失效
扭曲和包裹的阵列组织成处理元素的群集
- Patent Title: Twisted and wrapped array organized into clusters of processing elements
- Patent Title (中): 扭曲和包裹的阵列组织成处理元素的群集
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Application No.: US11830357Application Date: 2007-07-30
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Publication No.: US08341381B2Publication Date: 2012-12-25
- Inventor: Gerald George Pechanek , Charles W. Kurak, Jr.
- Applicant: Gerald George Pechanek , Charles W. Kurak, Jr.
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Law Offices of Peter H. Priest, PLLC
- Main IPC: G06F15/80
- IPC: G06F15/80

Abstract:
An array of processing elements (PEs) is logically twisted in a first direction, wrapped to form a cylindrical array, and grouped in a second direction to determine PEs that are to be located in clusters and implemented to form physical clusters of PEs. Inter-cluster communication paths are mutually exclusive. Due to the mutual exclusivity of the data paths, communications between the processing elements of each cluster may be combined in a single inter-cluster path, thus eliminating half the wiring required for the path. The length of the longest communication path is not directly determined by the overall dimension of the array, as in conventional torus arrays. Rather, the longest communications path is limited by the inter-cluster spacing. Transpose elements of an N×N torus may be combined in clusters and communicate with one another through intra-cluster communications paths. Transpose operation latency is eliminated in this approach. Each PE may have a single transmit port and a single receive port. Thus, the individual PEs are decoupled from the array topology.
Public/Granted literature
- US20080052491A1 Manifold Array Processor Public/Granted day:2008-02-28
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