Invention Grant
- Patent Title: Thin foil semiconductor package
- Patent Title (中): 薄箔半导体封装
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Application No.: US12903870Application Date: 2010-10-13
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Publication No.: US08341828B2Publication Date: 2013-01-01
- Inventor: Jaime A. Bayan , Nghia Thuc Tu , Will Kiang Wong , David Chin
- Applicant: Jaime A. Bayan , Nghia Thuc Tu , Will Kiang Wong , David Chin
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Steven A. Shaw; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: B23P19/00
- IPC: B23P19/00 ; H01L21/00

Abstract:
The present invention relates to methods and arrangements for using a thin foil to form electrical interconnects in an integrated circuit package. One such arrangement involves a foil carrier structure, which includes a foil adhered to a carrier having cavities. Some methods of the present invention involve attaching dice to the foil and encapsulating the foil carrier structure in a molding material. In one embodiment, the molding material presses against the foil, which causes portions of the foil to distend into the cavities of the carrier. As a result, recessed and raised areas are formed in the foil. Afterwards, the carrier is removed and portions of the raised areas in the foil are removed through one of a variety of techniques, such as grinding. This process helps define and electrical isolate contact pads in the foil. The resulting molded foil structure may then be singulated into multiple semiconductor packages.
Public/Granted literature
- US20110023293A1 THIN FOIL SEMICONDUCTOR PACKAGE Public/Granted day:2011-02-03
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