Invention Grant
US08343810B2 Semiconductor device and method of forming Fo-WLCSP having conductive layers and conductive vias separated by polymer layers
有权
形成具有导电层的Fo-WLCSP的半导体器件和方法以及由聚合物层分离的导电通孔
- Patent Title: Semiconductor device and method of forming Fo-WLCSP having conductive layers and conductive vias separated by polymer layers
- Patent Title (中): 形成具有导电层的Fo-WLCSP的半导体器件和方法以及由聚合物层分离的导电通孔
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Application No.: US12857362Application Date: 2010-08-16
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Publication No.: US08343810B2Publication Date: 2013-01-01
- Inventor: JiHoon Oh , SinJae Lee , JinGwan Kim
- Applicant: JiHoon Oh , SinJae Lee , JinGwan Kim
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/50
- IPC: H01L21/50

Abstract:
A Fo-WLCSP has a first polymer layer formed around a semiconductor die. First conductive vias are formed through the first polymer layer around a perimeter of the semiconductor die. A first interconnect structure is formed over a first surface of the first polymer layer and electrically connected to the first conductive vias. The first interconnect structure has a second polymer layer and a plurality of second vias formed through the second polymer layer. A second interconnect structure is formed over a second surface of the first polymer layer and electrically connected to the first conductive vias. The second interconnect structure has a third polymer layer and a plurality of third vias formed through the third polymer layer. A semiconductor package can be mounted to the WLCSP in a PoP arrangement. The semiconductor package is electrically connected to the WLCSP through the first interconnect structure or second interconnect structure.
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