Invention Grant
- Patent Title: Single poly NVM devices and arrays
- Patent Title (中): 单一的NV NV设备和阵列
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Application No.: US12109736Application Date: 2008-04-25
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Publication No.: US08344443B2Publication Date: 2013-01-01
- Inventor: Weize Chen , Richard J. De Souza , Xin Lin , Patrice M. Parris
- Applicant: Weize Chen , Richard J. De Souza , Xin Lin , Patrice M. Parris
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agency: Hamilton & Terrile, LLP
- Agent Michael Rocco Cannatti
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L27/115 ; H01L21/8247
Abstract:
A single-poly non-volatile memory includes a PMOS select transistor (210) formed with a select gate (212), and P+ source and drain regions (211, 213) formed in a shared n-well region (240), a serially connected PMOS floating gate transistor (220) formed with part of a p-type floating gate layer (222) and P+ source and drain regions (221, 223) formed in the shared n-well region (240), and a coupling capacitor (230) formed over a p-well region (250) and connected to the PMOS floating gate transistor (220), where the coupling capacitor (230) includes a first capacitor plate formed with a second part of the p-type floating gate layer (222) and an underlying portion of the p-well region (250).
Public/Granted literature
- US20090267127A1 Single Poly NVM Devices and Arrays Public/Granted day:2009-10-29
Information query
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