An ESD protection circuit including a first electrostatic discharge protection circuit provided between first power supply wiring and first ground wiring; a second ESD protection circuit provided between second power supply wiring and second ground wiring; a third ESD protection circuit provided between the first ground wiring and the second ground wiring; a PMOS transistor coupled to the first power supply wiring and provided between a first CMOS circuit coupled to the first ground wiring and the first power supply wiring, the first CMOS circuit receiving a signal from a first internal circuit and outputting a signal to a first node; an NMOS transistor provided between the first node and the first ground wiring; and an ESD detection circuit that renders the PMOS transistor conductive and the NMOS transistor non-conductive during normal operation, and renders the PMOS transistor non-conductive and the NMOS transistor conductive when an ESD is applied.