A processing system including a first processing module and a second processing module is disclosed. The first processing module transforms and amplifies a grounded signal to generate a first processed signal and transforms and amplifies a predetermined signal to generate a second processed signal. The second processing module transforms the first processed signal to a first digital code according to a first reference voltage group and transforms the second processed signal to a second digital code according to a second reference voltage group. The second processing module adjusts a third reference voltage group according to the first and the second digital codes, and during a normal mode, the second processing module generates a third digital code according to the adjusted third voltage group.