Invention Grant
- Patent Title: Terminal structure and manufacturing method thereof, and electronic device and manufacturing method thereof
- Patent Title (中): 端子结构及其制造方法以及电子器件及其制造方法
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Application No.: US12851274Application Date: 2010-08-05
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Publication No.: US08345435B2Publication Date: 2013-01-01
- Inventor: Toshiji Hamatani , Hiroki Adachi
- Applicant: Toshiji Hamatani , Hiroki Adachi
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Nixon Peabody LLP
- Agent Jeffrey L. Costellia
- Priority: JP2009-185092 20090807
- Main IPC: H05K1/03
- IPC: H05K1/03 ; H05K1/16 ; H01L23/48

Abstract:
A conductor having a projecting portion is formed which forms a terminal portion. An uncured prepreg including a reinforcing material is closely attached to the conductor and the prepreg is cured to form an insulating film including the reinforcing material. When the prepreg is closely attached, the prepreg is stretched by the projecting portion, so that a region of the prepreg, which is closely attached to the conductor, can be thinner than the other region of the prepreg. Then, by reducing the thickness of the entire insulating film, an opening can be formed in the portion having a smaller thickness. The step of reducing the thickness can be performed by etching. Further, it is preferable not to remove the reinforcing material in this step. The strength of a terminal and an electronic device can be increased by leaving the reinforcing material at the opening.
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