Invention Grant
US08345460B2 Semiconductor memory device 有权
半导体存储器件

Semiconductor memory device
Abstract:
The memory cell array has memory cells each positioned at respective intersections between a plurality of first wirings and a plurality of second wirings. Each of the memory cells has a rectifier element and a variable resistance element connected in series. The resistance element may have at least a first resistance value and a second resistance value higher than the first resistance value. The contact arrangement portion is formed to arrange a plurality of contacts on a plane. The contacts are connected to the first wirings or the second wirings. The probe can move along the plane to electrically contact with either of the contacts.
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