Invention Grant
US08345465B2 Driving method of variable resistance element, initialization method of variable resistance element, and nonvolatile storage device
有权
可变电阻元件的驱动方法,可变电阻元件的初始化方法和非易失性存储器件
- Patent Title: Driving method of variable resistance element, initialization method of variable resistance element, and nonvolatile storage device
- Patent Title (中): 可变电阻元件的驱动方法,可变电阻元件的初始化方法和非易失性存储器件
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Application No.: US12745300Application Date: 2009-09-30
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Publication No.: US08345465B2Publication Date: 2013-01-01
- Inventor: Shunsaku Muraoka , Takeshi Takagi , Satoru Mitani , Koji Katayama
- Applicant: Shunsaku Muraoka , Takeshi Takagi , Satoru Mitani , Koji Katayama
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2008-253107 20080930
- International Application: PCT/JP2009/005017 WO 20090930
- International Announcement: WO2010/038442 WO 20100408
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A method of driving a variable resistance element includes: a writing step performed by applying a writing voltage pulse having a first polarity to a variable resistance layer to change a resistance state of the layer from high to low; and an erasing step performed by applying an erasing voltage pulse having a second polarity to the layer to change the state from low to high. Here, |Vw1|>|Vw2| where Vw1 represents a voltage value of the writing voltage pulse for first to N-th writing steps (N≧1) and Vw2 represents a voltage value of the writing voltage pulse for (N+1)-th and subsequent writing steps, and |Ve1|>|Ve2| where Ve1 represents a voltage value of the erasing voltage pulse for first to M-th erasing steps (M≧1) and Ve2 represents a voltage value of the erasing voltage pulse for (M+1)-th and subsequent erasing steps. The (N+1)-th writing step follows the M-th erasing step.
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