One embodiment is a non-volatile memory cell with random access read, program, and erase. The memory cell includes a cell transistor that includes a source region, a drain region, a first insulating spacer, and a second insulating spacer. The memory cell also includes a source-side transistor, a drain-side transistor, a source-side multiplexer, a drain-side multiplexer, a source-side sense amplifier, and a drain-side write driver. A first binary value is stored in a first bit in the memory cell by trapping or releasing a first electric charge in the first insulating spacer. The first bit is read by sensing the resistive change in the cell transistor or by sensing the threshold voltage change in the cell transistor.